Software Engineer

Cadence Design Systems, Inc., Taiwan

About Me

I am a software engineer at Cadence Design Systems, Inc., working within the Pegasus Verification System team. I am interested in the realm of Electronic Design Automation (EDA), particularly in the domain of algorithmic thinking.

Before joining Cadence, I pursued my MSc in Computer Science from National Tsing Hua University (NTHU), and obtained my BSc in Computer Science and Information Engineering from Tamkang University (TKU) in Taiwan. During my graduate studies, I had the privilege of conducting research under the guidance of Prof. Tsung-Yi Ho and had the valuable opportunity to collaborate extensively with the Advanced Semiconductor Engineering (ASE) Group.

My motto is “Per Aspera Ad Astra,” a sentiment that reflects my aspiration to triumph over every challenge that comes my way throughout my entire life journey.

Latest News

Sep., 2024: Paper Acceptance
Our paper "Hybrid Detour Refinement Strategy for Package Substrate Routing" is accepted to 2025 30th Asia and South Pacific Design Automation Conference (ASP-DAC).

Jan., 2024: Paper Acceptance
Our paper "Hybrid Refinement Strategy for Package Substrate Routing" is accepted to 2024 The 25th Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI).

Sep., 2023: Job Commencement
I start my first job as a software engineer at Cadence Design Systems, Inc., Taiwan!

Aug., 2023: MSc Graduation
I completed my MSc in Computer Science from National Tsing Hua University (NTHU).

Nov., 2022: Paper Acceptance
Our paper "Deep Learning based Refinement for Package Substrate Routing" is accepted to 2023 IEEE 73rd Electronic Components and Technology Conference (ECTC).

Sep., 2021: MSc Admission
I commenced my MSc in Computer Science at National Tsing Hua University (NTHU).

Jun., 2021: BSc Graduation
I completed my BSc in Computer Science and Information Engineering from Tamkang University (TKU).

Sep., 2017: BSc Admission
I commenced my BSc in Computer Science and Information Engineering at Tamkang University (TKU).

Employment History

Sep. 2023 - present
Software Engineer II
Pegasus Verification System, Cadence Design Systems, Inc., Taiwan

Layout Versus Schematic (LVS) RC-mode:
- Implement newly netlist comparison algorithm (∼6x speedup, ∼80% memory reduction).

Education

Sep. 2021 - Aug. 2023
MSc, Computer Science
National Tsing Hua University, Taiwan

Tsing Hua Emerging Technology Automation (THETA) Lab
- Advisor: Prof. Tsung-Yi Ho
- Research Focus: Electronic Design Automation (EDA), Artificial Intelligence (AI)

Master Thesis: Hybrid Refinement Strategy for Package Substrate Routing
Overall GPA: 3.86/4.30

Sep. 2017 - Jun. 2021
BSc, Computer Science and Information Engineering
Tamkang University, Taiwan

Independent Study: TRIP-2-GO ~ A Convenient Platform for Traveler ~
Overall GPA: 3.96/4.00

Selected Publications

Hybrid Detour Refinement Strategy for Package Substrate Routing
Ding-Hsun Lin, Tsubasa Koyama, Yu-Jen Chen, Keng-Tuan Chang, Chih-Yi Huang, Chen-Chao Wang, and Tsung-Yi Ho
30th Asia and South Pacific Design Automation Conference (ASP-DAC), 2025

Abstract

Advanced packaging technologies have gained significant importance in recent years due to rapid technological advancements. In these designs, substrate routing plays a critical role in ensuring proper functioning and performance. Although existing automatic routing tools are available to assist designers in solving routing problems, they often produce suboptimal results or design rule violations (DRVs) when dealing with the complex constraints and specifications found in industrial designs. As a consequence, designers must dedicate weeks to optimizing and correcting the results generated by these automatic routing tools. In this work, a hybrid detour refinement strategy that combines rule-based and deep learning (DL)-based approaches is proposed to address these challenges. The aim is to reduce detours and improve area distribution in the auto-routing results of industrial Flip-Chip Ball Grid Array (FCBGA) substrate designs while decreasing the time required for modifications. Experimental results demonstrate that the proposed methods effectively enhance both detour reduction and area distribution, achieving an average improvement of 43% and 33%, respectively, compared to the auto-routed design. Furthermore, the modification time is also drastically reduced from weeks to minutes.

Hybrid Refinement Strategy for Package Substrate Routing
Tsubasa Koyama, Ding-Hsun Lin, Yu-Jen Chen, Keng-Tuan Chang, Chih-Yi Huang, Chen-Chao Wang, and Tsung-Yi Ho
The 25th Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI), 2024

Deep Learning based Refinement for Package Substrate Routing
Peng-Tai Huang, Tsubasa Koyama, Keng-Tuan Chang, Chih-Yi Huang, Chen-Chao Wang, and Tsung-Yi Ho
IEEE 73rd Electronic Components and Technology Conference (ECTC), 2023

Abstract

Heterogeneous integration packaging has become increasingly important due to recent rapid technological advancements. In these designs, substrate routing is a critical factor in terms of time to market. While there are some existing works and automatic routing tools available to help designers solve routing problems, they often result in poor performance due to the complex constraints and specifications of industrial designs. Manual revision of these results is time-consuming and can take weeks. In this work, we propose a deep learning approach to improving the area distribution and reducing detours in the autorouting results of industrial Flip-Chip Ball Grid Array (FCBGA) substrate designs, with the goal of reducing the time needed for manual modification. Experimental results show that our proposed methods can effectively refine both detours and area distribution in auto-routing results, producing results that are similar to manual routing. We also successfully reduce the modification time compared to manual one.

Teachings

Sep. 2021 - Jan. 2022, Teaching Assistant
11110CS 312000 Introduction of Integrated Circuit Design
National Tsing Hua University, Hsinchu

Sep. 2017 - Aug. 2021, Teaching Assistant
English Tutoring Center
Sunny English, Taipei

Interests

Playing Sports (Volleyball , Badminton , etc.)
Playing Board Games
Going to Karaoke
Listening to Music
Watching Anime
Reading Light Novels